Dr. Liu，电子科技大学博士，复睿微架构专家。 时钟电路是芯片中最基础的电路，时钟电路性能的好坏关乎SoC中所有电路能否 ...

Digitizing high-speed signals to a high resolution requires careful selection of a clock that will not compromise the sampling performance of the analog-to-digital converter (ADC). In this article, we ...

Jitter measurements are becoming increasingly important in the characterization and qualification of high-speed computing and communication systems. This is especially true with the recent ...

This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to ...

Jitter can seriously degrade system operation but, as Lee Morgan explains, characterising and troubleshooting jitter on embedded systems has become a lot easier. Clocks are the heartbeats of embedded ...

With the continued quest for ever-higher performance, the unit interval (UI) for a data valid window continues to shrink. At a 1-Gbit/s rate, the UI is 1000 ps, shrinking to 200 ps at 5 Gbits/s and a ...

High-speed communications require system designers to optimize clocking performance while adhering to both performance and cost-budget requirements. When selecting an optimal clock, the developer must ...

Satellite jitter, defined as unintended and rapid oscillations in a satellite’s orientation, remains a critical challenge for remote sensing applications that demand high geometric and radiometric ...