EDN

New programmable device family combines CPLD and FPGA features

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...
Electronic Design

PLD Family Bridges FPGA And CPLD Needs

Applications traditionally supported by high-density complex programmable-logic devices (CPLDs) and low-capacity FPGAs now have another option—the MachXO series of logic devices. Developed by Lattice ...
Design-Reuse

Lattice ispLEVER Classic Design Tools Now Support New CPLD Family

Full Production Support for Ultra Low Power ispMACH 4000ZE CPLDs HILLSBORO, OR - AUGUST 25, 2008 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of its ...
EDN

Technology advances reshape programmable logic offerings

For well over a generations of digital designers, programmable logic has been a key charm in their bag of tricks. The ability to procedurally and systematically replace what otherwise would be ...
Hackaday

Build One, Get Two: CPLD And STM32 Development On A Single Board

Programmable logic devices have claimed their place in the hobbyist world, with more and more projects showing up that feature either a CPLD or their bigger sibling, the FPGA. That place is rightfully ...
Design-Reuse

Lattice Announces New CPLD Family For Low Power, High Volume Portable Applications

ispMACH 4000ZE CPLDs Address Increasing Demand for Small, Low Power and Low Cost Portable Products HILLSBORO, OR - APRIL 28, 2008 - Lattice Semiconductor (NASDAQ: LSCC) today announced its new, ultra ...
Embedded

Leveraging FPGA and CPLD digital logic to implement analog to digital converters

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...
Hackaday

Emulating A 74LS48 BCD-to-7-Segment Decoder/Driver With An Altera MAX 7000 “S” Series ...

Over on the [Behind The Code with Gerry] YouTube channel our hacker [Gerry] shows us how to emulate a 74LS48 BCD-to-7-segment decoder/driver using an Altera CPLD Logic Chip From 1998. This is very ...
Electronic Design

Altera plans automotive grade CPLD, FPGA and structured ASIC devices

Targeting infotainment, networking, and driver-assistance applications. Altera said it will begin shipping automotive-grade devices for selected members of its CPLD, FPGA and structured ASIC device ...
Business Wire

Renesas Enters FPGA Market With the First Ultra-Low-Power, Low-Cost Family Addressing Low ...

TOKYO--(BUSINESS WIRE)--Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced that it is entering the Field-Programmable Gate Array (FPGA) ...
The Next Platform

What Will AMD Do With Programmable Logic And Other Xilinx IP?

AMD has finished its acquisition of Xilinx, which ended up costing close to $49 billion instead of the original $35 billion projected when the deal was announced in October 2020 thanks to the rise of ...