Semiconductor Engineering

Coding And Debugging RISC-V

As monolithic device scaling continues to wind down and evolve toward increasingly heterogeneous designs, it has created an inflection point for chip architects to create customized cores that are ...
EDN

Development environment builds RISC-V code

The Efinity RISC-V Embedded Software IDE from Efinix is an Eclipse-based integrated development environment (IDE) powered by Ashling’s RiscFree IDE. Efinity IDE offers intuitive development and ...
Digital Trends

ARM vs. RISC-V: Is one better than the other?

If you wanted to make a CPU, and you’re not AMD or Intel, there are two real choices: ARM and RISC-V. But what are the differences between the two, and why do companies choose one over the other?
Business Wire

Smaller Code, Higher Performance: Latest IAR Embedded Workbench for RISC-V Leverages ...

UPPSALA, Sweden--(BUSINESS WIRE)--IAR Systems®, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded ...
Electronic Design

Techniques to Minimize Code Footprint in RISC-V-Based Apps

RISC-V supported standard extensions. Hints to help the compiler make better decisions. Reasons why to avoid writing "clever code." 1. These are the standard ...
Semiconductor Engineering

Manage Your Risk In RISC-V

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...
Electronic Design

Working with High-Level-Language Debuggers in RISC-V-Based Apps

What are the RISC-V External Debug Support Version 0.13.2 specifications? Advantages of a using high-level-language debugger. The role of the ubiquitous breakpoints in debugging. How trace is ...
Geeky Gadgets

How RISC-V is Disrupting x86 and ARM in 2025

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...
CoinTelegraph

What is RISC-V, and why does Vitalik Buterin want it for Ethereum smart contracts?

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...
Ars Technica

Qualcomm announces first-ever mass-market RISC-V Android SoC

The Android ecosystem is hurtling toward a RISC-V future. The puzzle pieces for the up-and-coming CPU architecture started falling into place this past year when Google announced official RISC-V ...
csis.org

Sustaining Standards Leadership: The United States Cannot Disengage from RISC-V

RISC-V architecture is an open, international standard governing how software interfaces with hardware in a computer. It serves as a shared language that sets the parameters for communication and ...